> ## Documentation Index
> Fetch the complete documentation index at: https://docs.koppar.ai/llms.txt
> Use this file to discover all available pages before exploring further.

# Koppar docs: AI PCB design from one sentence

> Koppar is AI PCB design that goes all the way: a text description becomes a KiCad schematic, a placed and routed board, a priced BOM and Gerbers.

Koppar turns a description of a circuit into a board a fab can build. You write what the board has to do. Koppar picks real parts, draws the schematic, places and routes the PCB, checks it with KiCad, prices the bill of materials from live distributor stock, and releases the fab files when the board is clean.

The output is a genuine KiCad 10 project. Nothing is locked in. Open it, change it, order it.

## Who it is for

* **Makers and hobbyists** who know what they want to build and do not want to learn schematic capture first.
* **Firmware and software engineers** who need a carrier board, a sensor board or a dev board, and have no layout engineer to hand it to.
* **Hardware teams** who want a first revision in an afternoon and a KiCad project to take over from there.
* **Agent builders** who want to drive the pipeline from Claude Code, an MCP client or a script. See [Your own agent](/agents/overview).

## What you get

<CardGroup cols={2}>
  <Card title="Schematic" icon="diagram-project">
    A multi-sheet `.kicad_sch` with real library symbols, one sheet per function on larger designs.
  </Card>

  <Card title="Board" icon="microchip">
    A `.kicad_pcb` with footprints placed, every net routed, ground and power poured, 2 or 4 copper layers (1 to 8 when stated).
  </Card>

  <Card title="Checks" icon="list-check">
    Electrical rules on the schematic, KiCad DRC on the board, connectivity on every net. The report lists what is left, if anything.
  </Card>

  <Card title="Fab files" icon="box">
    Gerbers, drill files, IPC-2581, ODB++, a priced BOM, a pick-and-place file and an assembly bundle. Released only when the board passes.
  </Card>
</CardGroup>

## The rule that defines the product

Fab files are released only when the board has zero DRC errors and every net is connected. A board that is mostly routed is reported as such, with the list of what is missing. It never reaches a fab as "done".

## Where to go next

<Steps>
  <Step title="Run your first design">
    [Quickstart](/quickstart) covers the web studio from sign-in to download.
  </Step>
</Steps>


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